mt76x02_dma.h 1.7 KB

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  1. /* SPDX-License-Identifier: ISC */
  2. /*
  3. * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
  4. */
  5. #ifndef __MT76x02_DMA_H
  6. #define __MT76x02_DMA_H
  7. #include "mt76x02.h"
  8. #include "dma.h"
  9. #define MT_TXD_INFO_LEN GENMASK(15, 0)
  10. #define MT_TXD_INFO_NEXT_VLD BIT(16)
  11. #define MT_TXD_INFO_TX_BURST BIT(17)
  12. #define MT_TXD_INFO_80211 BIT(19)
  13. #define MT_TXD_INFO_TSO BIT(20)
  14. #define MT_TXD_INFO_CSO BIT(21)
  15. #define MT_TXD_INFO_WIV BIT(24)
  16. #define MT_TXD_INFO_QSEL GENMASK(26, 25)
  17. #define MT_TXD_INFO_DPORT GENMASK(29, 27)
  18. #define MT_TXD_INFO_TYPE GENMASK(31, 30)
  19. #define MT_RX_FCE_INFO_LEN GENMASK(13, 0)
  20. #define MT_RX_FCE_INFO_SELF_GEN BIT(15)
  21. #define MT_RX_FCE_INFO_CMD_SEQ GENMASK(19, 16)
  22. #define MT_RX_FCE_INFO_EVT_TYPE GENMASK(23, 20)
  23. #define MT_RX_FCE_INFO_PCIE_INTR BIT(24)
  24. #define MT_RX_FCE_INFO_QSEL GENMASK(26, 25)
  25. #define MT_RX_FCE_INFO_D_PORT GENMASK(29, 27)
  26. #define MT_RX_FCE_INFO_TYPE GENMASK(31, 30)
  27. /* MCU request message header */
  28. #define MT_MCU_MSG_LEN GENMASK(15, 0)
  29. #define MT_MCU_MSG_CMD_SEQ GENMASK(19, 16)
  30. #define MT_MCU_MSG_CMD_TYPE GENMASK(26, 20)
  31. #define MT_MCU_MSG_PORT GENMASK(29, 27)
  32. #define MT_MCU_MSG_TYPE GENMASK(31, 30)
  33. #define MT_MCU_MSG_TYPE_CMD BIT(30)
  34. #define MT_RX_HEADROOM 32
  35. #define MT76X02_RX_RING_SIZE 256
  36. enum dma_msg_port {
  37. WLAN_PORT,
  38. CPU_RX_PORT,
  39. CPU_TX_PORT,
  40. HOST_PORT,
  41. VIRTUAL_CPU_RX_PORT,
  42. VIRTUAL_CPU_TX_PORT,
  43. DISCARD,
  44. };
  45. static inline bool
  46. mt76x02_wait_for_wpdma(struct mt76_dev *dev, int timeout)
  47. {
  48. return __mt76_poll(dev, MT_WPDMA_GLO_CFG,
  49. MT_WPDMA_GLO_CFG_TX_DMA_BUSY |
  50. MT_WPDMA_GLO_CFG_RX_DMA_BUSY,
  51. 0, timeout);
  52. }
  53. int mt76x02_dma_init(struct mt76x02_dev *dev);
  54. void mt76x02_dma_disable(struct mt76x02_dev *dev);
  55. #endif /* __MT76x02_DMA_H */