mt76x02_eeprom.h 4.9 KB

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  1. /* SPDX-License-Identifier: ISC */
  2. /*
  3. * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
  4. * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
  5. */
  6. #ifndef __MT76x02_EEPROM_H
  7. #define __MT76x02_EEPROM_H
  8. #include "mt76x02.h"
  9. enum mt76x02_eeprom_field {
  10. MT_EE_CHIP_ID = 0x000,
  11. MT_EE_VERSION = 0x002,
  12. MT_EE_MAC_ADDR = 0x004,
  13. MT_EE_PCI_ID = 0x00A,
  14. MT_EE_ANTENNA = 0x022,
  15. MT_EE_CFG1_INIT = 0x024,
  16. MT_EE_NIC_CONF_0 = 0x034,
  17. MT_EE_NIC_CONF_1 = 0x036,
  18. MT_EE_COUNTRY_REGION_5GHZ = 0x038,
  19. MT_EE_COUNTRY_REGION_2GHZ = 0x039,
  20. MT_EE_FREQ_OFFSET = 0x03a,
  21. MT_EE_NIC_CONF_2 = 0x042,
  22. MT_EE_XTAL_TRIM_1 = 0x03a,
  23. MT_EE_XTAL_TRIM_2 = 0x09e,
  24. MT_EE_LNA_GAIN = 0x044,
  25. MT_EE_RSSI_OFFSET_2G_0 = 0x046,
  26. MT_EE_RSSI_OFFSET_2G_1 = 0x048,
  27. MT_EE_LNA_GAIN_5GHZ_1 = 0x049,
  28. MT_EE_RSSI_OFFSET_5G_0 = 0x04a,
  29. MT_EE_RSSI_OFFSET_5G_1 = 0x04c,
  30. MT_EE_LNA_GAIN_5GHZ_2 = 0x04d,
  31. MT_EE_TX_POWER_DELTA_BW40 = 0x050,
  32. MT_EE_TX_POWER_DELTA_BW80 = 0x052,
  33. MT_EE_TX_POWER_EXT_PA_5G = 0x054,
  34. MT_EE_TX_POWER_0_START_2G = 0x056,
  35. MT_EE_TX_POWER_1_START_2G = 0x05c,
  36. /* used as byte arrays */
  37. #define MT_TX_POWER_GROUP_SIZE_5G 5
  38. #define MT_TX_POWER_GROUPS_5G 6
  39. MT_EE_TX_POWER_0_START_5G = 0x062,
  40. MT_EE_TSSI_SLOPE_2G = 0x06e,
  41. MT_EE_TX_POWER_0_GRP3_TX_POWER_DELTA = 0x074,
  42. MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE = 0x076,
  43. MT_EE_TX_POWER_1_START_5G = 0x080,
  44. MT_EE_TX_POWER_CCK = 0x0a0,
  45. MT_EE_TX_POWER_OFDM_2G_6M = 0x0a2,
  46. MT_EE_TX_POWER_OFDM_2G_24M = 0x0a4,
  47. MT_EE_TX_POWER_OFDM_5G_6M = 0x0b2,
  48. MT_EE_TX_POWER_OFDM_5G_24M = 0x0b4,
  49. MT_EE_TX_POWER_HT_MCS0 = 0x0a6,
  50. MT_EE_TX_POWER_HT_MCS4 = 0x0a8,
  51. MT_EE_TX_POWER_HT_MCS8 = 0x0aa,
  52. MT_EE_TX_POWER_HT_MCS12 = 0x0ac,
  53. MT_EE_TX_POWER_VHT_MCS0 = 0x0ba,
  54. MT_EE_TX_POWER_VHT_MCS4 = 0x0bc,
  55. MT_EE_TX_POWER_VHT_MCS8 = 0x0be,
  56. MT_EE_2G_TARGET_POWER = 0x0d0,
  57. MT_EE_TEMP_OFFSET = 0x0d1,
  58. MT_EE_5G_TARGET_POWER = 0x0d2,
  59. MT_EE_TSSI_BOUND1 = 0x0d4,
  60. MT_EE_TSSI_BOUND2 = 0x0d6,
  61. MT_EE_TSSI_BOUND3 = 0x0d8,
  62. MT_EE_TSSI_BOUND4 = 0x0da,
  63. MT_EE_FREQ_OFFSET_COMPENSATION = 0x0db,
  64. MT_EE_TSSI_BOUND5 = 0x0dc,
  65. MT_EE_TX_POWER_BYRATE_BASE = 0x0de,
  66. MT_EE_TSSI_SLOPE_5G = 0x0f0,
  67. MT_EE_RF_TEMP_COMP_SLOPE_5G = 0x0f2,
  68. MT_EE_RF_TEMP_COMP_SLOPE_2G = 0x0f4,
  69. MT_EE_RF_2G_TSSI_OFF_TXPOWER = 0x0f6,
  70. MT_EE_RF_2G_RX_HIGH_GAIN = 0x0f8,
  71. MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN = 0x0fa,
  72. MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN = 0x0fc,
  73. MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN = 0x0fe,
  74. MT_EE_BT_RCAL_RESULT = 0x138,
  75. MT_EE_BT_VCDL_CALIBRATION = 0x13c,
  76. MT_EE_BT_PMUCFG = 0x13e,
  77. MT_EE_USAGE_MAP_START = 0x1e0,
  78. MT_EE_USAGE_MAP_END = 0x1fc,
  79. __MT_EE_MAX
  80. };
  81. #define MT_EE_ANTENNA_DUAL BIT(15)
  82. #define MT_EE_NIC_CONF_0_RX_PATH GENMASK(3, 0)
  83. #define MT_EE_NIC_CONF_0_TX_PATH GENMASK(7, 4)
  84. #define MT_EE_NIC_CONF_0_PA_TYPE GENMASK(9, 8)
  85. #define MT_EE_NIC_CONF_0_PA_INT_2G BIT(8)
  86. #define MT_EE_NIC_CONF_0_PA_INT_5G BIT(9)
  87. #define MT_EE_NIC_CONF_0_PA_IO_CURRENT BIT(10)
  88. #define MT_EE_NIC_CONF_0_BOARD_TYPE GENMASK(13, 12)
  89. #define MT_EE_NIC_CONF_1_HW_RF_CTRL BIT(0)
  90. #define MT_EE_NIC_CONF_1_TEMP_TX_ALC BIT(1)
  91. #define MT_EE_NIC_CONF_1_LNA_EXT_2G BIT(2)
  92. #define MT_EE_NIC_CONF_1_LNA_EXT_5G BIT(3)
  93. #define MT_EE_NIC_CONF_1_TX_ALC_EN BIT(13)
  94. #define MT_EE_NIC_CONF_2_ANT_OPT BIT(3)
  95. #define MT_EE_NIC_CONF_2_ANT_DIV BIT(4)
  96. #define MT_EE_NIC_CONF_2_XTAL_OPTION GENMASK(10, 9)
  97. #define MT_EFUSE_USAGE_MAP_SIZE (MT_EE_USAGE_MAP_END - \
  98. MT_EE_USAGE_MAP_START + 1)
  99. enum mt76x02_eeprom_modes {
  100. MT_EE_READ,
  101. MT_EE_PHYSICAL_READ,
  102. };
  103. enum mt76x02_board_type {
  104. BOARD_TYPE_2GHZ = 1,
  105. BOARD_TYPE_5GHZ = 2,
  106. };
  107. static inline bool mt76x02_field_valid(u8 val)
  108. {
  109. return val != 0 && val != 0xff;
  110. }
  111. static inline int
  112. mt76x02_sign_extend(u32 val, unsigned int size)
  113. {
  114. bool sign = val & BIT(size - 1);
  115. val &= BIT(size - 1) - 1;
  116. return sign ? val : -val;
  117. }
  118. static inline int
  119. mt76x02_sign_extend_optional(u32 val, unsigned int size)
  120. {
  121. bool enable = val & BIT(size);
  122. return enable ? mt76x02_sign_extend(val, size) : 0;
  123. }
  124. static inline s8 mt76x02_rate_power_val(u8 val)
  125. {
  126. if (!mt76x02_field_valid(val))
  127. return 0;
  128. return mt76x02_sign_extend_optional(val, 7);
  129. }
  130. static inline int
  131. mt76x02_eeprom_get(struct mt76x02_dev *dev,
  132. enum mt76x02_eeprom_field field)
  133. {
  134. if ((field & 1) || field >= __MT_EE_MAX)
  135. return -1;
  136. return get_unaligned_le16(dev->mt76.eeprom.data + field);
  137. }
  138. bool mt76x02_ext_pa_enabled(struct mt76x02_dev *dev, enum nl80211_band band);
  139. int mt76x02_get_efuse_data(struct mt76x02_dev *dev, u16 base, void *buf,
  140. int len, enum mt76x02_eeprom_modes mode);
  141. void mt76x02_get_rx_gain(struct mt76x02_dev *dev, enum nl80211_band band,
  142. u16 *rssi_offset, s8 *lna_2g, s8 *lna_5g);
  143. u8 mt76x02_get_lna_gain(struct mt76x02_dev *dev,
  144. s8 *lna_2g, s8 *lna_5g,
  145. struct ieee80211_channel *chan);
  146. void mt76x02_eeprom_parse_hw_cap(struct mt76x02_dev *dev);
  147. int mt76x02_eeprom_copy(struct mt76x02_dev *dev,
  148. enum mt76x02_eeprom_field field,
  149. void *dest, int len);
  150. #endif /* __MT76x02_EEPROM_H */