testmode.c 16 KB

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  1. // SPDX-License-Identifier: ISC
  2. /* Copyright (C) 2020 Felix Fietkau <nbd@nbd.name> */
  3. #include "mt76.h"
  4. static const struct nla_policy mt76_tm_policy[NUM_MT76_TM_ATTRS] = {
  5. [MT76_TM_ATTR_RESET] = { .type = NLA_FLAG },
  6. [MT76_TM_ATTR_STATE] = { .type = NLA_U8 },
  7. [MT76_TM_ATTR_TX_COUNT] = { .type = NLA_U32 },
  8. [MT76_TM_ATTR_TX_RATE_MODE] = { .type = NLA_U8 },
  9. [MT76_TM_ATTR_TX_RATE_NSS] = { .type = NLA_U8 },
  10. [MT76_TM_ATTR_TX_RATE_IDX] = { .type = NLA_U8 },
  11. [MT76_TM_ATTR_TX_RATE_SGI] = { .type = NLA_U8 },
  12. [MT76_TM_ATTR_TX_RATE_LDPC] = { .type = NLA_U8 },
  13. [MT76_TM_ATTR_TX_RATE_STBC] = { .type = NLA_U8 },
  14. [MT76_TM_ATTR_TX_LTF] = { .type = NLA_U8 },
  15. [MT76_TM_ATTR_TX_ANTENNA] = { .type = NLA_U8 },
  16. [MT76_TM_ATTR_TX_SPE_IDX] = { .type = NLA_U8 },
  17. [MT76_TM_ATTR_TX_POWER_CONTROL] = { .type = NLA_U8 },
  18. [MT76_TM_ATTR_TX_POWER] = { .type = NLA_NESTED },
  19. [MT76_TM_ATTR_TX_DUTY_CYCLE] = { .type = NLA_U8 },
  20. [MT76_TM_ATTR_TX_IPG] = { .type = NLA_U32 },
  21. [MT76_TM_ATTR_TX_TIME] = { .type = NLA_U32 },
  22. [MT76_TM_ATTR_FREQ_OFFSET] = { .type = NLA_U32 },
  23. };
  24. void mt76_testmode_tx_pending(struct mt76_phy *phy)
  25. {
  26. struct mt76_testmode_data *td = &phy->test;
  27. struct mt76_dev *dev = phy->dev;
  28. struct mt76_wcid *wcid = &dev->global_wcid;
  29. struct sk_buff *skb = td->tx_skb;
  30. struct mt76_queue *q;
  31. u16 tx_queued_limit;
  32. int qid;
  33. if (!skb || !td->tx_pending)
  34. return;
  35. qid = skb_get_queue_mapping(skb);
  36. q = phy->q_tx[qid];
  37. tx_queued_limit = td->tx_queued_limit ? td->tx_queued_limit : 1000;
  38. spin_lock_bh(&q->lock);
  39. while (td->tx_pending > 0 &&
  40. td->tx_queued - td->tx_done < tx_queued_limit &&
  41. q->queued < q->ndesc / 2) {
  42. int ret;
  43. ret = dev->queue_ops->tx_queue_skb(dev, q, skb_get(skb), wcid,
  44. NULL);
  45. if (ret < 0)
  46. break;
  47. td->tx_pending--;
  48. td->tx_queued++;
  49. }
  50. dev->queue_ops->kick(dev, q);
  51. spin_unlock_bh(&q->lock);
  52. }
  53. static u32
  54. mt76_testmode_max_mpdu_len(struct mt76_phy *phy, u8 tx_rate_mode)
  55. {
  56. switch (tx_rate_mode) {
  57. case MT76_TM_TX_MODE_HT:
  58. return IEEE80211_MAX_MPDU_LEN_HT_7935;
  59. case MT76_TM_TX_MODE_VHT:
  60. case MT76_TM_TX_MODE_HE_SU:
  61. case MT76_TM_TX_MODE_HE_EXT_SU:
  62. case MT76_TM_TX_MODE_HE_TB:
  63. case MT76_TM_TX_MODE_HE_MU:
  64. if (phy->sband_5g.sband.vht_cap.cap &
  65. IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991)
  66. return IEEE80211_MAX_MPDU_LEN_VHT_7991;
  67. return IEEE80211_MAX_MPDU_LEN_VHT_11454;
  68. case MT76_TM_TX_MODE_CCK:
  69. case MT76_TM_TX_MODE_OFDM:
  70. default:
  71. return IEEE80211_MAX_FRAME_LEN;
  72. }
  73. }
  74. static void
  75. mt76_testmode_free_skb(struct mt76_phy *phy)
  76. {
  77. struct mt76_testmode_data *td = &phy->test;
  78. dev_kfree_skb(td->tx_skb);
  79. td->tx_skb = NULL;
  80. }
  81. int mt76_testmode_alloc_skb(struct mt76_phy *phy, u32 len)
  82. {
  83. #define MT_TXP_MAX_LEN 4095
  84. u16 fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_DATA |
  85. IEEE80211_FCTL_FROMDS;
  86. struct mt76_testmode_data *td = &phy->test;
  87. bool ext_phy = phy != &phy->dev->phy;
  88. struct sk_buff **frag_tail, *head;
  89. struct ieee80211_tx_info *info;
  90. struct ieee80211_hdr *hdr;
  91. u32 max_len, head_len;
  92. int nfrags, i;
  93. max_len = mt76_testmode_max_mpdu_len(phy, td->tx_rate_mode);
  94. if (len > max_len)
  95. len = max_len;
  96. else if (len < sizeof(struct ieee80211_hdr))
  97. len = sizeof(struct ieee80211_hdr);
  98. nfrags = len / MT_TXP_MAX_LEN;
  99. head_len = nfrags ? MT_TXP_MAX_LEN : len;
  100. if (len > IEEE80211_MAX_FRAME_LEN)
  101. fc |= IEEE80211_STYPE_QOS_DATA;
  102. head = alloc_skb(head_len, GFP_KERNEL);
  103. if (!head)
  104. return -ENOMEM;
  105. hdr = __skb_put_zero(head, head_len);
  106. hdr->frame_control = cpu_to_le16(fc);
  107. memcpy(hdr->addr1, phy->macaddr, sizeof(phy->macaddr));
  108. memcpy(hdr->addr2, phy->macaddr, sizeof(phy->macaddr));
  109. memcpy(hdr->addr3, phy->macaddr, sizeof(phy->macaddr));
  110. skb_set_queue_mapping(head, IEEE80211_AC_BE);
  111. info = IEEE80211_SKB_CB(head);
  112. info->flags = IEEE80211_TX_CTL_INJECTED |
  113. IEEE80211_TX_CTL_NO_ACK |
  114. IEEE80211_TX_CTL_NO_PS_BUFFER;
  115. if (ext_phy)
  116. info->hw_queue |= MT_TX_HW_QUEUE_EXT_PHY;
  117. frag_tail = &skb_shinfo(head)->frag_list;
  118. for (i = 0; i < nfrags; i++) {
  119. struct sk_buff *frag;
  120. u16 frag_len;
  121. if (i == nfrags - 1)
  122. frag_len = len % MT_TXP_MAX_LEN;
  123. else
  124. frag_len = MT_TXP_MAX_LEN;
  125. frag = alloc_skb(frag_len, GFP_KERNEL);
  126. if (!frag) {
  127. mt76_testmode_free_skb(phy);
  128. dev_kfree_skb(head);
  129. return -ENOMEM;
  130. }
  131. __skb_put_zero(frag, frag_len);
  132. head->len += frag->len;
  133. head->data_len += frag->len;
  134. *frag_tail = frag;
  135. frag_tail = &(*frag_tail)->next;
  136. }
  137. mt76_testmode_free_skb(phy);
  138. td->tx_skb = head;
  139. return 0;
  140. }
  141. EXPORT_SYMBOL(mt76_testmode_alloc_skb);
  142. static int
  143. mt76_testmode_tx_init(struct mt76_phy *phy)
  144. {
  145. struct mt76_testmode_data *td = &phy->test;
  146. struct ieee80211_tx_info *info;
  147. struct ieee80211_tx_rate *rate;
  148. u8 max_nss = hweight8(phy->antenna_mask);
  149. int ret;
  150. ret = mt76_testmode_alloc_skb(phy, td->tx_mpdu_len);
  151. if (ret)
  152. return ret;
  153. if (td->tx_rate_mode > MT76_TM_TX_MODE_VHT)
  154. goto out;
  155. if (td->tx_antenna_mask)
  156. max_nss = min_t(u8, max_nss, hweight8(td->tx_antenna_mask));
  157. info = IEEE80211_SKB_CB(td->tx_skb);
  158. rate = &info->control.rates[0];
  159. rate->count = 1;
  160. rate->idx = td->tx_rate_idx;
  161. switch (td->tx_rate_mode) {
  162. case MT76_TM_TX_MODE_CCK:
  163. if (phy->chandef.chan->band != NL80211_BAND_2GHZ)
  164. return -EINVAL;
  165. if (rate->idx > 4)
  166. return -EINVAL;
  167. break;
  168. case MT76_TM_TX_MODE_OFDM:
  169. if (phy->chandef.chan->band != NL80211_BAND_2GHZ)
  170. break;
  171. if (rate->idx > 8)
  172. return -EINVAL;
  173. rate->idx += 4;
  174. break;
  175. case MT76_TM_TX_MODE_HT:
  176. if (rate->idx > 8 * max_nss &&
  177. !(rate->idx == 32 &&
  178. phy->chandef.width >= NL80211_CHAN_WIDTH_40))
  179. return -EINVAL;
  180. rate->flags |= IEEE80211_TX_RC_MCS;
  181. break;
  182. case MT76_TM_TX_MODE_VHT:
  183. if (rate->idx > 9)
  184. return -EINVAL;
  185. if (td->tx_rate_nss > max_nss)
  186. return -EINVAL;
  187. ieee80211_rate_set_vht(rate, td->tx_rate_idx, td->tx_rate_nss);
  188. rate->flags |= IEEE80211_TX_RC_VHT_MCS;
  189. break;
  190. default:
  191. break;
  192. }
  193. if (td->tx_rate_sgi)
  194. rate->flags |= IEEE80211_TX_RC_SHORT_GI;
  195. if (td->tx_rate_ldpc)
  196. info->flags |= IEEE80211_TX_CTL_LDPC;
  197. if (td->tx_rate_stbc)
  198. info->flags |= IEEE80211_TX_CTL_STBC;
  199. if (td->tx_rate_mode >= MT76_TM_TX_MODE_HT) {
  200. switch (phy->chandef.width) {
  201. case NL80211_CHAN_WIDTH_40:
  202. rate->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
  203. break;
  204. case NL80211_CHAN_WIDTH_80:
  205. rate->flags |= IEEE80211_TX_RC_80_MHZ_WIDTH;
  206. break;
  207. case NL80211_CHAN_WIDTH_80P80:
  208. case NL80211_CHAN_WIDTH_160:
  209. rate->flags |= IEEE80211_TX_RC_160_MHZ_WIDTH;
  210. break;
  211. default:
  212. break;
  213. }
  214. }
  215. out:
  216. return 0;
  217. }
  218. static void
  219. mt76_testmode_tx_start(struct mt76_phy *phy)
  220. {
  221. struct mt76_testmode_data *td = &phy->test;
  222. struct mt76_dev *dev = phy->dev;
  223. td->tx_queued = 0;
  224. td->tx_done = 0;
  225. td->tx_pending = td->tx_count;
  226. mt76_worker_schedule(&dev->tx_worker);
  227. }
  228. static void
  229. mt76_testmode_tx_stop(struct mt76_phy *phy)
  230. {
  231. struct mt76_testmode_data *td = &phy->test;
  232. struct mt76_dev *dev = phy->dev;
  233. mt76_worker_disable(&dev->tx_worker);
  234. td->tx_pending = 0;
  235. mt76_worker_enable(&dev->tx_worker);
  236. wait_event_timeout(dev->tx_wait, td->tx_done == td->tx_queued,
  237. MT76_TM_TIMEOUT * HZ);
  238. mt76_testmode_free_skb(phy);
  239. }
  240. static inline void
  241. mt76_testmode_param_set(struct mt76_testmode_data *td, u16 idx)
  242. {
  243. td->param_set[idx / 32] |= BIT(idx % 32);
  244. }
  245. static inline bool
  246. mt76_testmode_param_present(struct mt76_testmode_data *td, u16 idx)
  247. {
  248. return td->param_set[idx / 32] & BIT(idx % 32);
  249. }
  250. static void
  251. mt76_testmode_init_defaults(struct mt76_phy *phy)
  252. {
  253. struct mt76_testmode_data *td = &phy->test;
  254. if (td->tx_mpdu_len > 0)
  255. return;
  256. td->tx_mpdu_len = 1024;
  257. td->tx_count = 1;
  258. td->tx_rate_mode = MT76_TM_TX_MODE_OFDM;
  259. td->tx_rate_nss = 1;
  260. }
  261. static int
  262. __mt76_testmode_set_state(struct mt76_phy *phy, enum mt76_testmode_state state)
  263. {
  264. enum mt76_testmode_state prev_state = phy->test.state;
  265. struct mt76_dev *dev = phy->dev;
  266. int err;
  267. if (prev_state == MT76_TM_STATE_TX_FRAMES)
  268. mt76_testmode_tx_stop(phy);
  269. if (state == MT76_TM_STATE_TX_FRAMES) {
  270. err = mt76_testmode_tx_init(phy);
  271. if (err)
  272. return err;
  273. }
  274. err = dev->test_ops->set_state(phy, state);
  275. if (err) {
  276. if (state == MT76_TM_STATE_TX_FRAMES)
  277. mt76_testmode_tx_stop(phy);
  278. return err;
  279. }
  280. if (state == MT76_TM_STATE_TX_FRAMES)
  281. mt76_testmode_tx_start(phy);
  282. else if (state == MT76_TM_STATE_RX_FRAMES) {
  283. memset(&phy->test.rx_stats, 0, sizeof(phy->test.rx_stats));
  284. }
  285. phy->test.state = state;
  286. return 0;
  287. }
  288. int mt76_testmode_set_state(struct mt76_phy *phy, enum mt76_testmode_state state)
  289. {
  290. struct mt76_testmode_data *td = &phy->test;
  291. struct ieee80211_hw *hw = phy->hw;
  292. if (state == td->state && state == MT76_TM_STATE_OFF)
  293. return 0;
  294. if (state > MT76_TM_STATE_OFF &&
  295. (!test_bit(MT76_STATE_RUNNING, &phy->state) ||
  296. !(hw->conf.flags & IEEE80211_CONF_MONITOR)))
  297. return -ENOTCONN;
  298. if (state != MT76_TM_STATE_IDLE &&
  299. td->state != MT76_TM_STATE_IDLE) {
  300. int ret;
  301. ret = __mt76_testmode_set_state(phy, MT76_TM_STATE_IDLE);
  302. if (ret)
  303. return ret;
  304. }
  305. return __mt76_testmode_set_state(phy, state);
  306. }
  307. EXPORT_SYMBOL(mt76_testmode_set_state);
  308. static int
  309. mt76_tm_get_u8(struct nlattr *attr, u8 *dest, u8 min, u8 max)
  310. {
  311. u8 val;
  312. if (!attr)
  313. return 0;
  314. val = nla_get_u8(attr);
  315. if (val < min || val > max)
  316. return -EINVAL;
  317. *dest = val;
  318. return 0;
  319. }
  320. int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  321. void *data, int len)
  322. {
  323. struct mt76_phy *phy = hw->priv;
  324. struct mt76_dev *dev = phy->dev;
  325. struct mt76_testmode_data *td = &phy->test;
  326. struct nlattr *tb[NUM_MT76_TM_ATTRS];
  327. bool ext_phy = phy != &dev->phy;
  328. u32 state;
  329. int err;
  330. int i;
  331. if (!dev->test_ops)
  332. return -EOPNOTSUPP;
  333. err = nla_parse_deprecated(tb, MT76_TM_ATTR_MAX, data, len,
  334. mt76_tm_policy, NULL);
  335. if (err)
  336. return err;
  337. err = -EINVAL;
  338. mutex_lock(&dev->mutex);
  339. if (tb[MT76_TM_ATTR_RESET]) {
  340. mt76_testmode_set_state(phy, MT76_TM_STATE_OFF);
  341. memset(td, 0, sizeof(*td));
  342. }
  343. mt76_testmode_init_defaults(phy);
  344. if (tb[MT76_TM_ATTR_TX_COUNT])
  345. td->tx_count = nla_get_u32(tb[MT76_TM_ATTR_TX_COUNT]);
  346. if (tb[MT76_TM_ATTR_TX_RATE_IDX])
  347. td->tx_rate_idx = nla_get_u8(tb[MT76_TM_ATTR_TX_RATE_IDX]);
  348. if (mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_MODE], &td->tx_rate_mode,
  349. 0, MT76_TM_TX_MODE_MAX) ||
  350. mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_NSS], &td->tx_rate_nss,
  351. 1, hweight8(phy->antenna_mask)) ||
  352. mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_SGI], &td->tx_rate_sgi, 0, 2) ||
  353. mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_LDPC], &td->tx_rate_ldpc, 0, 1) ||
  354. mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_STBC], &td->tx_rate_stbc, 0, 1) ||
  355. mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_LTF], &td->tx_ltf, 0, 2) ||
  356. mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_ANTENNA], &td->tx_antenna_mask,
  357. 1 << (ext_phy * 2), phy->antenna_mask << (ext_phy * 2)) ||
  358. mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_SPE_IDX], &td->tx_spe_idx, 0, 27) ||
  359. mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_DUTY_CYCLE],
  360. &td->tx_duty_cycle, 0, 99) ||
  361. mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_POWER_CONTROL],
  362. &td->tx_power_control, 0, 1))
  363. goto out;
  364. if (tb[MT76_TM_ATTR_TX_LENGTH]) {
  365. u32 val = nla_get_u32(tb[MT76_TM_ATTR_TX_LENGTH]);
  366. if (val > mt76_testmode_max_mpdu_len(phy, td->tx_rate_mode) ||
  367. val < sizeof(struct ieee80211_hdr))
  368. goto out;
  369. td->tx_mpdu_len = val;
  370. }
  371. if (tb[MT76_TM_ATTR_TX_IPG])
  372. td->tx_ipg = nla_get_u32(tb[MT76_TM_ATTR_TX_IPG]);
  373. if (tb[MT76_TM_ATTR_TX_TIME])
  374. td->tx_time = nla_get_u32(tb[MT76_TM_ATTR_TX_TIME]);
  375. if (tb[MT76_TM_ATTR_FREQ_OFFSET])
  376. td->freq_offset = nla_get_u32(tb[MT76_TM_ATTR_FREQ_OFFSET]);
  377. if (tb[MT76_TM_ATTR_STATE]) {
  378. state = nla_get_u32(tb[MT76_TM_ATTR_STATE]);
  379. if (state > MT76_TM_STATE_MAX)
  380. goto out;
  381. } else {
  382. state = td->state;
  383. }
  384. if (tb[MT76_TM_ATTR_TX_POWER]) {
  385. struct nlattr *cur;
  386. int idx = 0;
  387. int rem;
  388. nla_for_each_nested(cur, tb[MT76_TM_ATTR_TX_POWER], rem) {
  389. if (nla_len(cur) != 1 ||
  390. idx >= ARRAY_SIZE(td->tx_power))
  391. goto out;
  392. td->tx_power[idx++] = nla_get_u8(cur);
  393. }
  394. }
  395. if (dev->test_ops->set_params) {
  396. err = dev->test_ops->set_params(phy, tb, state);
  397. if (err)
  398. goto out;
  399. }
  400. for (i = MT76_TM_ATTR_STATE; i < ARRAY_SIZE(tb); i++)
  401. if (tb[i])
  402. mt76_testmode_param_set(td, i);
  403. err = 0;
  404. if (tb[MT76_TM_ATTR_STATE])
  405. err = mt76_testmode_set_state(phy, state);
  406. out:
  407. mutex_unlock(&dev->mutex);
  408. return err;
  409. }
  410. EXPORT_SYMBOL(mt76_testmode_cmd);
  411. static int
  412. mt76_testmode_dump_stats(struct mt76_phy *phy, struct sk_buff *msg)
  413. {
  414. struct mt76_testmode_data *td = &phy->test;
  415. struct mt76_dev *dev = phy->dev;
  416. u64 rx_packets = 0;
  417. u64 rx_fcs_error = 0;
  418. int i;
  419. if (dev->test_ops->dump_stats) {
  420. int ret;
  421. ret = dev->test_ops->dump_stats(phy, msg);
  422. if (ret)
  423. return ret;
  424. }
  425. for (i = 0; i < ARRAY_SIZE(td->rx_stats.packets); i++) {
  426. rx_packets += td->rx_stats.packets[i];
  427. rx_fcs_error += td->rx_stats.fcs_error[i];
  428. }
  429. if (nla_put_u32(msg, MT76_TM_STATS_ATTR_TX_PENDING, td->tx_pending) ||
  430. nla_put_u32(msg, MT76_TM_STATS_ATTR_TX_QUEUED, td->tx_queued) ||
  431. nla_put_u32(msg, MT76_TM_STATS_ATTR_TX_DONE, td->tx_done) ||
  432. nla_put_u64_64bit(msg, MT76_TM_STATS_ATTR_RX_PACKETS, rx_packets,
  433. MT76_TM_STATS_ATTR_PAD) ||
  434. nla_put_u64_64bit(msg, MT76_TM_STATS_ATTR_RX_FCS_ERROR, rx_fcs_error,
  435. MT76_TM_STATS_ATTR_PAD))
  436. return -EMSGSIZE;
  437. return 0;
  438. }
  439. int mt76_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *msg,
  440. struct netlink_callback *cb, void *data, int len)
  441. {
  442. struct mt76_phy *phy = hw->priv;
  443. struct mt76_dev *dev = phy->dev;
  444. struct mt76_testmode_data *td = &phy->test;
  445. struct nlattr *tb[NUM_MT76_TM_ATTRS] = {};
  446. int err = 0;
  447. void *a;
  448. int i;
  449. if (!dev->test_ops)
  450. return -EOPNOTSUPP;
  451. if (cb->args[2]++ > 0)
  452. return -ENOENT;
  453. if (data) {
  454. err = nla_parse_deprecated(tb, MT76_TM_ATTR_MAX, data, len,
  455. mt76_tm_policy, NULL);
  456. if (err)
  457. return err;
  458. }
  459. mutex_lock(&dev->mutex);
  460. if (tb[MT76_TM_ATTR_STATS]) {
  461. err = -EINVAL;
  462. a = nla_nest_start(msg, MT76_TM_ATTR_STATS);
  463. if (a) {
  464. err = mt76_testmode_dump_stats(phy, msg);
  465. nla_nest_end(msg, a);
  466. }
  467. goto out;
  468. }
  469. mt76_testmode_init_defaults(phy);
  470. err = -EMSGSIZE;
  471. if (nla_put_u32(msg, MT76_TM_ATTR_STATE, td->state))
  472. goto out;
  473. if (dev->test_mtd.name &&
  474. (nla_put_string(msg, MT76_TM_ATTR_MTD_PART, dev->test_mtd.name) ||
  475. nla_put_u32(msg, MT76_TM_ATTR_MTD_OFFSET, dev->test_mtd.offset)))
  476. goto out;
  477. if (nla_put_u32(msg, MT76_TM_ATTR_TX_COUNT, td->tx_count) ||
  478. nla_put_u32(msg, MT76_TM_ATTR_TX_LENGTH, td->tx_mpdu_len) ||
  479. nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_MODE, td->tx_rate_mode) ||
  480. nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_NSS, td->tx_rate_nss) ||
  481. nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_IDX, td->tx_rate_idx) ||
  482. nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_SGI, td->tx_rate_sgi) ||
  483. nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_LDPC, td->tx_rate_ldpc) ||
  484. nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_STBC, td->tx_rate_stbc) ||
  485. (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_LTF) &&
  486. nla_put_u8(msg, MT76_TM_ATTR_TX_LTF, td->tx_ltf)) ||
  487. (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_ANTENNA) &&
  488. nla_put_u8(msg, MT76_TM_ATTR_TX_ANTENNA, td->tx_antenna_mask)) ||
  489. (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_SPE_IDX) &&
  490. nla_put_u8(msg, MT76_TM_ATTR_TX_SPE_IDX, td->tx_spe_idx)) ||
  491. (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_DUTY_CYCLE) &&
  492. nla_put_u8(msg, MT76_TM_ATTR_TX_DUTY_CYCLE, td->tx_duty_cycle)) ||
  493. (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_IPG) &&
  494. nla_put_u32(msg, MT76_TM_ATTR_TX_IPG, td->tx_ipg)) ||
  495. (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_TIME) &&
  496. nla_put_u32(msg, MT76_TM_ATTR_TX_TIME, td->tx_time)) ||
  497. (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_POWER_CONTROL) &&
  498. nla_put_u8(msg, MT76_TM_ATTR_TX_POWER_CONTROL, td->tx_power_control)) ||
  499. (mt76_testmode_param_present(td, MT76_TM_ATTR_FREQ_OFFSET) &&
  500. nla_put_u8(msg, MT76_TM_ATTR_FREQ_OFFSET, td->freq_offset)))
  501. goto out;
  502. if (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_POWER)) {
  503. a = nla_nest_start(msg, MT76_TM_ATTR_TX_POWER);
  504. if (!a)
  505. goto out;
  506. for (i = 0; i < ARRAY_SIZE(td->tx_power); i++)
  507. if (nla_put_u8(msg, i, td->tx_power[i]))
  508. goto out;
  509. nla_nest_end(msg, a);
  510. }
  511. err = 0;
  512. out:
  513. mutex_unlock(&dev->mutex);
  514. return err;
  515. }
  516. EXPORT_SYMBOL(mt76_testmode_dump);